A D flip-flop is an edge-triggered bistable multivibrator that serves as the fundamental storage building block in synchronous digital circuits. On each active clock transition (typically rising edge ↑CLK), the logic level present at data input D is latched into internal master-slave stages and transferred to output Q, while complementary output Q̄ updates to its inverse. Between clock edges, the stored state remains invariant regardless of ongoing fluctuations at input D.