A full adder is a core combinational logic circuit that computes the arithmetic sum of three binary bits: operands A and B, plus an input carry bit C_in from a preceding arithmetic stage. Using two cascaded XOR gates, two AND gates, and an OR gate, it generates both a single-bit sum S and a generated carry-out C_out. Chaining multiple full adders in series or lookahead trees forms multi-bit arithmetic execution units within microprocessors.