FPGA Look-Up Table (LUT)

Computer Engineering

How It Works

A Look-Up Table (LUT) is the fundamental reconfigurable digital logic element inside Field-Programmable Gate Arrays (FPGAs), capable of implementing any boolean function of K input variables. A K-input LUT incorporates 2^K static configuration memory (SRAM) cells whose outputs route through a tree of pass-transistor multiplexers addressed by input lines. Loading precomputed truth tables directly into memory achieves universal logic programmability without specialized silicon fabrication.

Governing Equation
Y = LUT[A_{K-1} · 2^(K-1) + … + A_0 · 2^0] , N_{functions} = 2^(2^K)